Embedded

It seems a new memory technology is needed to shrink MCUs and SoCs without redesigning the memory system and keep costs in check.

What we know is that there’s room for only one of these to succeed in a big way, and the others will continue to serve market niches. For discrete memory chips, this fact presents a nearly impenetrable barrier that stands in the way of widespread adoption. Therefore, high-volume production of SoC and MCU wafers that include MRAM, for example, would drive down the production cost of discrete MRAM at the same time. With this understanding, we have been able to compile a 10-year forecast for memory revenues that projects the annual revenues for both embedded and standalone emerging memories shown in Figure 2, which was taken from the report. The second of these is a key reason for Intel’s recent announcement that Optane was to be “wound down.” Note that the MRAM line represents combined discrete and embedded memory. The data in this chart, which runs from 90 nm to 5 nm, shows that the area of SRAM cells in research chips has shrunk an average of 17% per process node while the process has shrunk an average of 21%. In fact, there is, and it comes in the form of emerging memories—those memories that aren’t mainstream today, but could allow the industry to continue to reduce chip costs through process shrinks (black line in Fig. Several others are in development in the hope of making their mark on the industry. These emerging memories are the subject of a new report from Objective Analysis and Coughlin Associates: What has that to do with discrete memory chips, and who says that memory can’t be supported on CMOS logic? While that can get expensive, since SRAM used six transistors per bit and NOR uses only one, it solves the current problem, and serial NOR chips are pretty cheap.